AS578
The AS578 is the AS-family chip where the design budget leans on algorithm rather than peripheral breadth — a fingerprint safe SoC tuned for tough rejection-rate targets inside industrial access hardware. It is the mid-tier performer between the module companion parts and the flagship: same engine, sharper cost curve.
Key specifications
| Function | Fingerprint enrollment and 1:1 / 1:N verification with algorithm-first silicon budget |
|---|---|
| Algorithm | In-house DSP-based matching engine — rejection-rate tuning is the chip's design priority |
| Positioning | Mid tier of the AS family: algorithm capacity of the flagship, leaner peripheral set |
| Sensor interface | Capacitive semiconductor fingerprint arrays (BS-series compatible) |
| Host interfaces | SPI / UART (USB available per SKU configuration) |
| Target applications | Industrial access panels, government-facing enrollment and verification terminals |
| Marking | AS578 (mid-tier fingerprint algorithm chip) |
Full specification
| Parameter | Value | Note |
|---|---|---|
| Product family | AS-series fingerprint secure SoC | Mid-tier performer |
| Algorithm engine | DSP-based, in-house, algorithm-first silicon | 400+ registered IP across group |
| Template capacity | Typical panel platform: 200–500 templates | Configurable via SDK |
| Match latency (1:N) | Sub-second class | SDK-tuned per platform |
| Interfaces | SPI / UART, USB per SKU config | Documented in SDK |
| Sensor support | BS-series capacitive arrays | 508 DPI class |
| Fake-finger defense | Company 99.99% rejection rate claim, lab-verified | Liveness checks available on module platforms |
| Operating environment | Industrial temperature-class design | See AM-series module for −40~85°C fixture data |
| Packaging | Surface-mount, tape/reel on request | ESD-safe handling documented |
Board-level values vary with sensor and clock config — the FAE team validates against your schematic within 48h.
High-rejection-rate logic at a mid-tier price.
Industrial gate hardware is where the FAR/FRR budget matters most: a false accept at a logistics yard door is not a rounding error. The AS578 concentrates the silicon spend where it counts — the matching engine — while keeping interfaces lean:
- Algorithm-first silicon — the DSP engine dominates the die, so rejection targets are met without stepping to flagship-class packaging.
- One firmware tree — same command dialect as AS608, so a project that later needs more interfaces moves up the family instead of rewriting.
- Wizard-proof enrollment — SDK routines log FAR/FRR per threshold during commissioning, with thresholds tuned in the field.
Auditable identity at a department's scale.
Announced biometrics programs need identity hardware that survives re-enrollment waves of thousands of people — fingers worn, dried, and never the same twice:
- BS-array capacitive sensing keeps collection consistent across workers with dissimilar skin conditions (config on request).
- Unit-level test pass and 24h-class aging flows in the same footprint as the module lines.
- 2-year warranty from the first unit — a department's refresh cycle, not a race.
AS578 FAQs
One pc is the MOQ. Samples ship in 1–3 days with the free SDK, datasheet and reference schematic for the BS-series pairing.
Its die allocation prioritizes the DSP matching engine over peripheral breadth — you get flagship-class FAR/FRR performance with a leaner interface set and BOM cost point.
Yes — the SDK exposes FAR/FRR thresholds per platform, and the FAE team will help you calibrate against your enrollment population within 48h.
Prove your rejection target before the panel run.
Share your acceptance test procedure — get a matched sensor-AS578 matrix and a boundary sample offer within 48h.
