Chips · Fingerprint SoC
5th generation fingerprint security silicon

AS608

A single-chip fingerprint security SoC — in-house matching algorithm on national-standard secure execution, built for door locks, attendance devices and financial terminals. Ships with a free SDK, demo routine and 48h FAE access.

In-house algorithm SPI / UART / USB Free SDK
Verified · unit-level test pass
AS608 fingerprint security SoC package

Key specifications

AS608 · datasheet extractRev 5.0
FunctionFingerprint enrollment, 1:1 and 1:N verification on-chip
AlgorithmIn-house DSP-based matching algorithm — company rejection rate 99.99% verified in lab
Sensor interfaceCapacitive semiconductor fingerprint arrays (BS-series compatible)
Host interfacesSPI, UART, USB — SDK examples for all three
Security featuresSecure storage for template data; compatible with dedicated encryption co-processors (AS569)
Target applicationsSmart locks, time attendance, financial terminals, access controllers
MarkingAS608 (5th generation, black QFN-class package)

Full specification

ParameterValueNote
Product familyAS-series fingerprint secure SoC5th generation performer
Algorithm engineDSP-based, in-house400+ registered IP across group
Template capacityTypical lock platform: 200+ templatesConfigurable via SDK
Match latency (1:N)Sub-second classSDK-tuned per platform
InterfacesSPI / UART / USBAll documented in SDK
Sensor supportBS-series capacitive arrays508 DPI-class
Operating environmentIndustrial temperature-class designSee AM-series module for full −40~85°C fixture
Fake-finger defenseCompany 99.99% rejection rate claim, lab-verifiedLiveness checks available on module platforms
PackagingSurface-mount, tape/reel on requestESD-safe handling documented

Board-level values vary with sensor and clock config — the FAE bench confirms your clock tree within 48h.

Smart door lock with fingerprint sensor
Application · Smart lock

One chip, one 4-layer board.

Door-lock OEMs in the smart lock segment shipped over 45 M units in 2025, with China holding about 55% of global output. The AS608 platform was built for exactly this class of product:

  • Payload of identity — fingerprint runs on-chip, templates stay in secure storage; pairing with an AS569 crypto coprocessor covers encryption and payment-class use.
  • Fast bring-up — SDK examples for SPI/UART/USB mean a working demo in a day, not a month.
  • Factory-ready — 24h aging flows and unit-level test pass mirror the module lines; 2-year warranty from first unit.
Face recognition terminal mounted on a wall beside an office glass partition
Application · Terminals

Attendance, but auditable.

Buddy punching affects about 75% of US employers and costs 3–5% of payroll for a typical 50-person firm. Terminal integrators use AS608 with BS-array sensors to build tamper-evident, template-local identity:

  • 1:1 and 1:N modes on a single chip — no cloud dependency for core identity.
  • SDK lets you tune thresholds to your market's FAR/FRR target without cost of new silicon.
  • Same interface as AM-series modules — scale to a standard product line in one roadmap.

AS608 FAQs

Yes — 1 pc is the MOQ. Samples ship in 1–3 days with a free SDK, datasheet and demo board guidance.

The in-house algorithm is part of the chip; the SDK and its demo routines are free. Merging your own biometric logic onto the platform is a documented, supported workflow.

BS-series capacitive arrays (BS807, BS817, BS870A, BS900T) are the reference set; the FAE team will match your sensor model within 48h.

Let an engineer verify your AS608 design.

Send your schematic notes or target product — get a model matrix, updated datasheet and sample offer within 48h.

Get FAE support →