Four layers.
Zero handoffs.
Chip design, matching algorithms, sensor integration, terminal engineering — all in one engineering organization, so a question raised at your bench reaches the person who owns the silicon.
The chain, as four stations
Every project — from a 1 pc sample to a 5,000-piece run — passes through the same four gates in the same order.
Silicon design
SoCs and coprocessors designed in-house: fingerprint engines, face processors, QR decoders, crypto cores.
Algorithm
Matching, liveness and decode algorithms trained and tuned on our own captive data and benches.
Module
Sensor fit, optics, firmware and one documented interface — the SKU your BOM references.
System + compliance
Terminal assembly, protocol integration, and an honest route to market: pre-scan and technical files for CE/FCC-class paths.
The algorithm is a product, not a feature.
Our matchers run in silicon we drew, against biometric data we enroll ourselves — fingers in wet and dry states, faces under noisy light, labels that are worn, curved or half-occluded.
- Fingerprint — DSP-based matching rejecting fake fingers at a lab-verified company rate of 99.99% on the platform tier; 360° capture across the AM160 family.
- Face — dual RGB+IR liveness with sub-0.3 s identification and 5,000–50,000 user tiers at terminal level.
- Decode — 4 mil class, 99.9%+ declared decode rate on the AS732/AS733 platform, full code-table coverage.
Platform matrix
| Platform | Line | What it is | Key spec anchors |
|---|---|---|---|
| AS608 / AS618 / AS578 | Chips | Fingerprint secure SoCs — in-house matcher on chip | SPI/UART/USB · 200+ templates · 508 DPI-class arrays |
| AS810 / AS812 | Chips | Face algorithm processors | 4K@30 fps encode · liveness · 40–70 cm recognition class |
| AS732 / AS733 | Chips | QR decode SoCs | 4 mil precision · 99.9%+ decode · USB/serial/keyboard ports |
| AS569 | Chips | Security crypto coprocessor | TDES/AES/RSA · 1,000-template engine · financial-grade |
| AM160 family | Fingerprint | 360° capture modules ⌀14–16 mm | 1,000 templates · 0.3 s · −40~85°C |
| BFC / BFP family | Face | Dual-lens and face + palm-vein modules | RGB+IR liveness · 0.3–1.9 m reach · UART/USB 2.0 |
| U / W / X scan engines | Barcode | 2D imagers, rugged and fixed modules | 4 mil · USB/RS232 · 2.4G+BT 2600 mAh wireless class |
| TM-Ai / TFS / TM-SS | Access | Face terminals, attendance units, controllers | 0.3 s · DC12V 2A · 5,000–50,000 users · TCP/IP + RS485 |
Values are published per SKU on each model page; family-class figures are labelled as such. On-datasheet only items are listed per page as "on request".
Ways we engage
Chip-level design-in
Schematic review, SDK porting and tunable thresholds — FAE validates against your schematic within 48h.
Module OEM
Custom cables, connectors, firmware parameters and capacity tiers; logo silkscreen from a few hundred pcs.
Terminal ODM
Fascia, UI language, logo and box customization on face, fingerprint and attendance terminals.
Compliance route
Pre-scan and technical-file structure for CE/FCC-class routes — honestly scoped, never claimed pending.
Bring the project, keep the layer count.
Tell us what your product must verify, and we map it to the cheapest reliable layer — chip, module or terminal — in 48h.
